HD6417750 Datasheet, PDF (278/1039 Pages) Renesas Technology Corp – SuperH RISC engine

9.2.2 Peripheral Module Pin High Impedance Control
When bit 6 in the standby control register (STBCR) is set to 1, peripheral module related pins go
to the high-impedance state in standby mode.
• Relevant Pins
SCI related pins
DMA related pins
MD0/SCK
MD7/TXD
CTS2
DACK0
DACK1
MD1/TXD2
MD8/RTS2
DRAK0
DRAK1
• Other Information
The setting in this register is invalid when the above pins are used as port output pins.
For details of pin states, see Appendix E, Pin Functions.
9.2.3 Peripheral Module Pin Pull-Up Control
When bit 5 in the standby control register (STBCR) is cleared to 0, peripheral module related pins
are pulled up when in the input or high-impedance state.
• Relevant Pins
SCI related pins
DMA related pins
TMU related pin
MD0/SCK
MD7/TXD
RXD
'5(43
'5(44
TCLK
MD1/TXD2
MD8/RTS2
CTS2
DACK0
DACK1
MD2/RXD2
SCK2/05(6(7
DRAK0
DRAK1
• Other Information
The setting in this register is invalid in the hardware standby mode.
For details of pin states, see Appendix E, Pin Functions.
Rev. 6.0, 07/02, page 226 of 986