HD6417750 Datasheet, PDF (956/1039 Pages) Renesas Technology Corp – SuperH RISC engine

Figure 22.41 DRAM Burst Bus Cycle (EDO Mode, RCD[1:0] = 01, AnW[2:0] = 001,
TPC[2:0] = 001, 2-Cycle CAS Negate Pulse Width)
Rev. 6.0, 07/02, page 904 of 986