HD6417750 Datasheet, PDF (419/1039 Pages) Renesas Technology Corp – SuperH RISC engine

13.2.12 Refresh Timer Counter (RTCNT)
The refresh timer counter (RTCNT) is an 8-bit readable/writable counter that is incremented by
the input clock (selected by bits CKS2–CKS0 in the RTCSR register). When the RTCNT counter
value matches the RTCOR register value, the CMF bit is set in the RTCSR register and the
RTCNT counter is cleared.
RTCNT is initialized to H'0000 by a power-on reset, but continues to count when a manual reset is
performed. In standby mode, RTCNT is not initialized, and retains its contents.
Bit: 15
14
13
12
11
10
9
8
Bit name: —
—
—
—
—
—
—
—
Initial value: 0
0
0
0
0
0
0
0
R/W: —
—
—
—
—
—
—
—
Bit: 7
6
5
4
3
2
1
0
Bit name:
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Rev. 6.0, 07/02, page 367 of 986