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| HD6417750 Datasheet, PDF (966/1039 Pages) Renesas Technology Corp – SuperH RISC engine | |||
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CKIO
A25âA0
RD/
D63âD0
(write)
TRr1
TRr2
TRr3
TRr4
tAD
tCSD
tRWD
tRASD
tRASD
tCASD1
tCASD1
tWDD
TRr5
Trc
Trc
Trc
tRASD
tCASD1
DACKn
(SA: IO â memory)
DACKn
(SA: IO â memory)
tDACD
tDACD
Notes: IO: DACK device
SA: Single address DMA transfer
DA: Dual address DMA transfer
DACK set to active-high
Figure 22.51 DRAM Bus Cycle: DRAM Self-Refresh (TRC[2:0] = 001)
Rev. 6.0, 07/02, page 914 of 986
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