HD6417750 Datasheet, PDF (322/1039 Pages) Renesas Technology Corp – SuperH RISC engine

Table 11.2 RTC Registers (cont)
Initialization
Abbrevia-
Power-On Manual Standby Initial
Name tion
R/W Reset Reset Mode Value
Area 7
P4 Address Address
Access
Size
Month RMONCNT R/W Counts Counts Counts Undefined H'FFC80018 H'1FC80018 8
counter
Year RYRCNT R/W Counts Counts Counts Undefined H'FFC8001C H'1FC8001C 16
counter
Second RSECAR
alarm
register
R/W Initialized^*1 Held
Held Undefined^*1 H'FFC80020 H'1FC80020 8
Minute RMINAR
alarm
register
R/W Initialized^*1 Held
Held Undefined^*1 H'FFC80024 H'1FC80024 8
Hour RHRAR
alarm
register
R/W Initialized^*1 Held
Held Undefined^*1 H'FFC80028 H'1FC80028 8
Day-of-
week
alarm
register
RWKAR
R/W Initialized^*1 Held
Held Undefined^*1 H'FFC8002C H'1FC8002C 8
Day RDAYAR
alarm
register
R/W Initialized^*1 Held
Held Undefined^*1 H'FFC80030 H'1FC80030 8
Month RMONAR R/W Initialized^*1 Held
alarm
register
Held Undefined^*1 H'FFC80034 H'1FC80034 8
RTC
control
register
1
RCR1
R/W Initialized Initialized Held H'00^*3
H'FFC80038 H'1FC80038 8
RTC
control
register
2
RCR2
R/W Initialized Initialized^*2 Held
H'09^*4
H'FFC8003C H'1FC8003C 8
RTC
control
register
3^*5
RCR3
R/W Initialized Held
Held H'00
H'FFC80050 H'1FC80050 8
Year RYRAR
alarm
register^*5
R/W Held
Held
Held Undefined H'FFC80054 H'1FC80054 16
Notes: *1 The ENB bit in each register is initialized.
*2 Bits other than the RTCEN bit and START bit are initialized.
*3 The value of the CF bit and AF bit is undefined.
*4 The value of the PEF bit is undefined.
*5 SH7750R only
Rev. 6.0, 07/02, page 270 of 986