HD6417750 Datasheet, PDF (731/1039 Pages) Renesas Technology Corp – SuperH RISC engine

16.2.11 Serial Port Register (SCSPTR2)
Bit: 15
14
13
12
11
10
9
8
—
—
—
—
—
—
—
—
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
Bit: 7
6
5
4
3
RTSIO RTSDT CTSIO CTSDT —
Initial value: 0
—
0
—
0
R/W: R/W R/W R/W R/W
R
2
1
0
— SPB2IO SPB2DT
0
0
—
R
R/W R/W
SCSPTR2 is a 16-bit readable/writable register that controls input/output and data for the port pins
multiplexed with the serial communication interface (SCIF) pins. Input data can be read from the
RxD2 pin, output data written to the TxD2 pin, and breaks in serial transmission/reception
controlled, by means of bits 1 and 0. Data can be read from, and output data written to, the &765
pin by means of bits 5 and 4. Data can be read from, and output data written to, the 5765 pin by
means of bits 6 and 7.
SCSPTR2 can be read or written to by the CPU at all times. All SCSPTR2 bits except bits 6, 4,
and 0 are initialized to 0 by a power-on reset or manual reset; the value of bits 6, 4, and 0 is
undefined. SCSPTR2 is not initialized in standby mode or in the module standby state.
Bits 15 to 8—Reserved: These bits are always read as 0, and should only be written with 0.
Bit 7—Serial Port RTS Port I/O (RTSIO): Specifies the serial port 5765 pin input/output
condition. When the 5765 pin is actually set as a port output pin and outputs the value set by the
RTSDT bit, the MCE bit in SCFCR2 should be cleared to 0.
Bit 7: RTSIO
0
1
Description
RTSDT bit value is not output to 5765 pin
RTSDT bit value is output to 5765 pin
(Initial value)
Rev. 6.0, 07/02, page 679 of 986