HD6417750 Datasheet, PDF (687/1039 Pages) Renesas Technology Corp – SuperH RISC engine

Transmitting
station
Receiving
station A
(ID = 01)
Serial transmission line
Receiving
station B
(ID = 02)
Receiving
station C
(ID = 03)
Receiving
station D
(ID = 04)
Serial
data
H'01
(MPB = 1)
H'AA
(MPB = 0)
ID transmission cycle:
Receiving station
specification
MPB: Multiprocessor bit
Data transmission cycle:
Data transmission to
receiving station specified
by ID
Figure 15.12 Example of Inter-Processor Communication Using Multiprocessor Format
(Transmission of Data H'AA to Receiving Station A)
Data Transfer Formats
There are four data transfer formats. When the multiprocessor format is specified, the parity bit
specification is invalid. For details, see table 15.10.
Clock
See the description under Clock in section 15.3.2.
Data Transfer Operations
Multiprocessor Serial Data Transmission: Figure 15.13 shows a sample flowchart for
multiprocessor serial data transmission.
Use the following procedure for multiprocessor serial data transmission after enabling the SCI for
transmission.
Rev. 6.0, 07/02, page 635 of 986