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HD6417750 Datasheet, PDF (511/1039 Pages) Renesas Technology Corp – SuperH RISC engine
CKIO
/
D63–D0
Tm1
Tmd1
A
D0
RD/
DACKn
(DA)
Note: For DACKn, an example is shown where CHCRn.AL (access level) = 0 for the DMAC.
Figure 13.59 MPX Interface Timing 3
(Single Write Cycle, AnW = 0, No Wait, Bus Width: 64 Bits)
Rev. 6.0, 07/02, page 459 of 986