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HD6417750 Datasheet, PDF (576/1039 Pages) Renesas Technology Corp – SuperH RISC engine
Table 14.7 Relationship between DMA Transfer Type, Request Mode, and Bus Mode
Address
Mode
Type of Transfer
Request Bus Transfer Size Usable
Mode
Mode (Bits)
Channels
Single
External device with DACK External B/C
and external memory
8/16/32/64/32B 0, 1 (2, 3)*6
External device with DACK External B/C
and memory-mapped
external device
8/16/32/64/32B 0, 1 (2, 3)*6
Dual
External memory and
external memory
Internal*1 B/C
External*7
8/16/32/64/32B 0, 1, 2, 3*5 *6
External memory and
memory-mapped external
device
Internal*1 B/C
External*7
8/16/32/64/32B 0, 1, 2, 3*5 *6
Memory-mapped external Internal*1 B/C
device and memory-mapped External*7
external device
8/16/32/64/32B 0, 1, 2, 3*5 *6
External memory and
on-chip peripheral module
Internal*2 B/C*3
8/16/32/64*4 0, 1, 2, 3*5 *6
Memory-mapped external
device and on-chip
peripheral module
Internal*2 B/C*3 8/16/32/64*4 0, 1, 2, 3*5 *6
32B: 32-byte burst transfer
B:
Burst
C:
Cycle steal
External: External request
Internal: Auto-request or on-chip peripheral module request
Notes: *1 External request, auto-request, or on-chip peripheral module request (TMU input
capture interrupt request) possible. In the case of an on-chip peripheral module request,
it is not possible to specify external memory data transfer with the SCI (SCIF) as the
transfer request source.
*2 External request, auto-request, or on-chip peripheral module request possible. If the
transfer request source is the SCI (SCIF), either the transfer source must be SCRDR1
(SCFRDR2) or the transfer destination must be SCTDR1 (SCFTDR2).
*3 When the transfer request source is the SCI (SCIF), only cycle steal mode can be used.
*4 Access size permitted for the on-chip peripheral module register that is the transfer
source or transfer destination.
*5 When the transfer request is an external request, only channels 0 and 1 can be used.
*6 In DDT mode, transfer requests can be accepted for all channels from external devices
capable of DTR format output.
*7 See tables 14.8 and 14.9 for the transfer sources and transfer destinations in DMA
transfer by means of an external request.
Rev. 6.0, 07/02, page 524 of 986