HD6417750 Datasheet, PDF (344/1039 Pages) Renesas Technology Corp – SuperH RISC engine

12.1.2 Block Diagram
Figure 12.1 shows a block diagram of the TMU.
RESET, STBY, TUNE0,TUNE1 PCLK/4,16, 64^*1
etc.
TUNI2 ICPI2 TCLK RTCCLK
TUNI3, 4^*2
TMU
control unit
Prescaler
To each To channels
channel 0 to 2
TCLK
control unit
TOCR
Ch 0, 1
Counter unit
Interrupt
contrun unit
Ch 2
Counter unit
Interrupt
contrun unit
Ch 3, 4^*2
Counter unit
TSTR
TSTR2^*2
Interrupt
contrun unit
TCR
TCOR
TCNT
TCR2 TCOR2 TCNT2 TCPR2
TCR
TCOR
TCNT
Bus interface
Internal peripheral module bus
Notes: *1 Signals with 1/4, 1/16, and 1/64 the Pφ frequency, supplied to the on-chip peripheral functions.
*2 SH7750R only
Figure 12.1 Block Diagram of TMU
12.1.3 Pin Configuration
Table 12.1 shows the TMU pins.
Table 12.1 TMU Pins
Pin Name
Abbreviation
I/O
Clock input/clock output TCLK
I/O
Function
External clock input pin/input capture
control input pin/RTC output pin
(shared with RTC)
Rev. 6.0, 07/02, page 292 of 986