HD6417750 Datasheet, PDF (894/1039 Pages) Renesas Technology Corp – SuperH RISC engine

22.3 AC Characteristics
In principle, SH7750 Series input should be synchronous. Unless specified otherwise, ensure that
the setup time and hold times for each input signal are observed.
Table 22.17 Clock Timing (HD6417750RBP240)
Item
Symbol Min
Typ
Max
Unit
Operating CPU, FPU, cache, TLB f
frequency _{External bus}
1
—
240
MHz
1
—
120
Peripheral modules
1
—
60
Table 22.18 Clock Timing (HD6417750RF240)
Item
Symbol Min
Typ
Max
Unit
Operating CPU, FPU, cache, TLB f
frequency _{External bus}
1
—
240
MHz
1
—
84
Peripheral modules
1
—
60
Table 22.19 Clock Timing (HD6417750BP200M, HD6417750SBP200, HD6417750RBP200)
Item
Symbol Min
Typ
Max
Unit
Operating CPU, FPU, cache, TLB f
frequency _{External bus}
1
—
200
MHz
1
—
100
Peripheral modules
1
—
50
Table 22.20 Clock Timing (HD6417750RF200)
Item
Symbol Min
Typ
Max
Unit
Operating CPU, FPU, cache, TLB f
frequency _{External bus}
1
—
200
MHz
1
—
84
Peripheral modules
1
—
50
Table 22.21 Clock Timing (HD6417750SF200)
Item
Symbol Min
Typ
Max
Unit
Operating CPU, FPU, cache, TLB f
frequency _{External bus}
1
—
200
MHz
1
—
67
Peripheral modules
1
—
50
Rev. 6.0, 07/02, page 842 of 986