HD6417750 Datasheet, PDF (317/1039 Pages) Renesas Technology Corp – SuperH RISC engine

10.9.4 Using Interval Timer Mode
When the WDT is operating in interval timer mode, an interval timer interrupt is generated each
time the counter overflows. This enables interrupts to be generated at fixed intervals.
1. Clear the WT/,7 bit in the WTCSR register to 0, select the count clock with bits CKS2–CKS0,
and set the initial value in the WTCNT counter.
2. When the TME bit in the WTCSR register is set to 1, the count starts in interval timer mode.
3. When the counter overflows, the WDT sets the IOVF flag in the WTCSR register to 1, and
sends an interval timer interrupt request to INTC. The counter continues counting.
10.10 Notes on Board Design
When Using a Crystal Resonator: Place the crystal resonator and capacitors close to the EXTAL
and XTAL pins. To prevent induction from interfering with correct oscillation, ensure that no
other signal lines cross the signal lines for these pins.
CL1
CL2
Avoid crossing signal lines
R
EXTAL XTAL
SH7750 Series
Recommended values
CL1 = CL2 = 0–33 pF
R = 0Ω
Note: The values for CL1, CL2, and the damping resistance should be determined after
consultation with the crystal resonator manufacturer.
Figure 10.4 Points for Attention when Using Crystal Resonator
When Inputting External Clock from EXTAL Pin: Make no connection to the XTAL pin.
Rev. 6.0, 07/02, page 265 of 986