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HD6417750 Datasheet, PDF (933/1039 Pages) Renesas Technology Corp – SuperH RISC engine | |||
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CKIO
A25âA5
A4âA0
RD/
D31âD0
(read)
T1 TB2 TB1 TB2 TB1 TB2 TB1 T2
tAD
tAD
tAD
tCSD
tRWD
tRSD tRSD
tRDS
tRDH
tBSD tBSD
tCSD
tRWD
tRSD
tRDS
tRDH
DACKn
(SA: IO â memory)
DACKn
(DA)
tDACD tDACD tDACD
tDACD
tDACD
Notes: IO: DACK device
SA: Single address DMA transfer
DA: Dual address DMA transfer
DACK set to active-high
Figure 22.19 Burst ROM Bus Cycle (No Wait)
Rev. 6.0, 07/02, page 881 of 986
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