HD6417750 Datasheet, PDF (685/1039 Pages) Renesas Technology Corp – SuperH RISC engine

Start
1
bit
Data
Parity Stop Start
bit bit bit
Data
Parity Stop
bit bit
Serial
0 D0 D1
D7 0/1 1 0 D0 D1
D7 0/1 0
0/1
data
RDRF
FER
RXI interrupt
request
One frame
SCRDR1 data read and
RDRF flag cleared to 0
by RXI interrupt handler
ERI interrupt request
generated by framing
error
Figure 15.11 Example of SCI Receive Operation
(Example with 8-Bit Data, Parity, One Stop Bit)
Rev. 6.0, 07/02, page 633 of 986