HD6417750 Datasheet, PDF (744/1039 Pages) Renesas Technology Corp – SuperH RISC engine

1
Serial
data
Start
bit
Data
Parity Stop Start
bit bit bit
Data
Parity Stop
bit bit
0 D0 D1
D7 0/1 1 0 D0 D1
D7 0/1 1
1
Idle state
(mark state)
TDFE
TEND
TXI interrupt
request
Data written to SCFTDR2
and TDFE flag read as 1
then cleared to 0 by TXI
interrupt handler
TXI interrupt
request
One frame
Figure 16.8 Example of Transmit Operation
(Example with 8-Bit Data, Parity, One Stop Bit)
4. When modem control is enabled, transmission can be stopped and restarted in accordance with
the &765 input value. When &765 is set to 1, if transmission is in progress, the line goes to the
mark state after transmission of one frame. When &765 is set to 0, the next transmit data is
output starting from the start bit.
Figure 16.9 shows an example of the operation when modem control is used.
Serial data
TxD2
Start
bit
0 D0 D1
Parity Stop
bit bit
D7 0/1 1
Start
bit
0 D0 D1
D7 0/1
CTS2
Drive high before stop bit
Figure 16.9 Example of Operation Using Modem Control (&765)
Rev. 6.0, 07/02, page 692 of 986