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HD6417750 Datasheet, PDF (228/1039 Pages) Renesas Technology Corp – SuperH RISC engine | |||
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Table 7.1 Addressing Modes and Effective Addresses (cont)
Addressing Instruction
Mode
Format
Effective Address Calculation Method
Register
@(disp:4, Rn) Effective address is register Rn contents with
indirect with
4-bit displacement disp added. After disp is
displacement
zero-extended, it is multiplied by 1 (byte), 2 (word),
or 4 (longword), according to the operand size.
Rn
disp
(zero-extended)
+
Ã
Rn + disp à 1/2/4
Calculation
Formula
Byte: Rn +
disp â EA
Word: Rn +
disp à 2 â EA
Longword:
Rn + disp à 4
â EA
Indexed
register
indirect
@(R0, Rn)
1/2/4
Effective address is sum of register Rn and R0
contents.
Rn
+
Rn + R0
Rn + R0 â EA
GBR indirect @(disp:8,
with
GBR)
displacement
R0
Effective address is register GBR contents with
8-bit displacement disp added. After disp is
zero-extended, it is multiplied by 1 (byte), 2 (word),
or 4 (longword), according to the operand size.
GBR
disp
+
(zero-extended)
Ã
GBR
+ disp à 1/2/4
Byte: GBR +
disp â EA
Word: GBR +
disp à 2 â EA
Longword:
GBR + disp Ã
4 â EA
1/2/4
Indexed
@(R0, GBR) Effective address is sum of register GBR and R0
GBR indirect
contents.
GBR
+
GBR + R0
GBR + R0 â
EA
R0
Rev. 6.0, 07/02, page 176 of 986
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