HD6417750 Datasheet, PDF (16/1039 Pages) Renesas Technology Corp – SuperH RISC engine

Section
14.6 Configuration of the
DMAC (SH7750R)
14.7 Register Descriptions
(SH7750R)
14.8 Operation (SH7750R)
14.9 Usage Notes
15.2.8 Serial Port Register
(SCSPTR1)
16.1.2 Block Diagram
Page
574
579
586
591
592
609
659
16.1.3 Pin Configuration
660
16.2.6 Serial Control
667
Register (SCSCR2)
16.2.7 Serial Status Register 669
(SCFSR2)
672
672
16.2.9 FIFO Control Register 676
(SCFCR2)
16.2.11 Serial Port Register
(SCSPTR2)
16.3.2 Serial Operation
689
696
17.1 Overview
703
17.3.2 Pin Connections
711
18.1.3 Pin Configuration
740
19.1.2 Block Diagram
752
19.1.4 Register Configuration 753
19.2.3 On-Chip Peripheral
Module Interrupts
757, 758
Item
Description
Newly added
Newly added
4.
9.
Bit 7
Added
Description amended
Newly added
Description amended
Figure 16.1 Block Diagram
of SCIF
Table 16.1 SCIF Pins
Bit 1
Amended
Note changed
Description amended
Bit 7—Receive Error (ER)
Bit 3—Framing Error (FER)
Bit 2—Parity Error (PER)
Bits 10 to 8
Note description
changed
Description changed
Description changed
SH7750R added
Figure 16.6 MRESET/SCK2
Pin
Figure 16.6 Sample SCIF
Initialization Flowchart
Serial Data Reception
Table 18.3 SCIF I/O Port
Pins
Figure 19.1 Block Diagram
of INTC
Table 19.2 INTC Registers
Deleted
Amended
Description added to 5.
Description amended
Description deleted
Amended
Amended
Description added to
table, Notes added and
amended
Description added and
amended
Rev. 6.0, 07/02, page xiv of I