HD6417750 Datasheet, PDF (458/1039 Pages) Renesas Technology Corp – SuperH RISC engine

CKIO
A25–A0
Tnop
Tc1
Tc2
Tc1
Tc2
Tc1
Tc2
Tc1
Tc2
c0
c1
c2
c3
RD/
End of RAS down mode
D63–D0
(read)
D63–D0
(write)
d0
d0
d1
d1
d2
d2
d3
d3
DACKn
(SA: IO ← memory)
DACKn
(SA: IO → memory)
Note: For DACKn, an example is shown where CHCRn.AL (access level) = 0 for the DMAC.
Figure 13.22 (2) DRAM Burst Bus Cycle, RAS Down Mode Continuation
(Fast Page Mode, RCD = 0, AnW = 0)
Rev. 6.0, 07/02, page 406 of 986