SAM4L Datasheet, PDF (992/1185 Pages) ATMEL Corporation – ATSAM ARM-based Flash MCU

ATSAM4L4/L2
Note that all ADCIFE controls will be ignored until SR.EN goes to ‘1’.
Before the ADCIFE can be used, the Internal Reference Voltage signal must be selected by writ-
ing the CFG.REFSEL field and the I/O Controller must be configured correctly. Refer to I/O
Controller section for details. The user must also configure the frequency range by writting the
CFG.SPEED field.
Note that once configured, ADCIFE configuration registers should not be written during opera-
tion since they are permanently used by the ADCIFE. The user must ensure that ADCIFE is
stopped during configuration unless he knows what he is doing.
38.6.2
Basic Operation
To convert analog values to digital values the user must first initialize the ADCIFE as described
in Section 38.6.1. When the ADCIFE is initialized, the sequencer must be configured by writing
into the Sequencer Configuration Register (SEQCFG) all the necessary bits or fields for the next
conversion. This configuration can also be performed by Peripheral DMA Rx channel access.
Configuring channel N for a given conversion instructs the ADCIFE to convert the analog voltage
applied to AD pin N. To start converting data the user can either manually start a conversion
sequence by write a one to the sequencer trigger event (STRIG) bit in the Control Register (CR)
or configure an automatic trigger to initiate the conversions. The automatic trigger can be config-
ured to trig on many different conditions. Refer to Section 38.6.13 for details. The result of the
conversions are stored in the Last Converted Value register (LCV) as they become available,
overwriting the result from the previous conversion. To avoid data loss, the user must read the
conversion results as they become available either by using an interrupt handler or by using a
Peripheral DMA channel to copy the results to memory. Failing to do so will result in an Overrun
Error condition, indicated by the LOVR bit in the Status Register (SR). To use an interrupt han-
dler the user must enable the End Of Conversion (EOC) interrupt request by writing a one to the
corresponding bit in the Interrupt Enable Register (IER). To clear the interrupt after the conver-
sion result is read, the user must write a one to the corresponding bit in the Status Clear
Register (SCR).
To use a Peripheral DMA Controller Tx channel, the user must configure the Peripheral DMA
Controller appropriately. The DMA Controller will, when configured, automatically read con-
verted data as they become available. There is no need to manually clear any bits in the
Interrupt Status Register as this is performed by the hardware. If an Overrun Error condition hap-
pens during DMA operation, the LOVR bit in the SR will be set.
38.6.3
ADC Resolution
This ADC is a cyclic pipeline 12-bit or 8-bit resolution.
Resolution can be changed by writing the resolution field (RES) in the Sequencer Configuration
Register (SEQCFG). By default, after a reset, the resolution is set to 12-bit.
38.6.4
Differential and Single-Ended Conversion Modes
The ADC has two conversion modes; differential and single-ended. If measuring signals where
the positive input is always at a higher voltage than the negative input, the single-ended conver-
sion mode should be used in order to have full 12-bit resolution in the conversion mode, which
has only positive values. If however the positive input may go below the negative input creating
some negative results, the differential mode should be used in order to get correct results. The
configuration of the conversion mode is set in the field bipolar in SEQCFG
(SEQCFG.BIPOLAR).
42023C–SAM–02/2013
992