SAM4L Datasheet, PDF (116/1185 Pages) ATMEL Corporation – ATSAM ARM-based Flash MCU

10.7.6 Clock Failure Detector Control Register
Name:
CFDCTRL
Access Type:
Read/Write
Offset:
0x054
Reset Value:
0x00000000
ATSAM4L4/L2
31
30
29
28
27
26
25
24
SFV
-
-
-
-
-
-
-
23
22
21
20
19
18
17
16
-
-
-
-
-
-
-
-
15
14
13
12
11
10
9
8
-
-
-
-
-
-
-
-
7
6
5
4
3
2
1
0
-
-
-
-
-
-
-
CFDEN
• SFV: Store Final Value
0: The register is read/write.
1: The register is read-only, to protect against further accidental writes.
• CFDEN: Clock Failure Detection Enable
0: Clock Failure Detector is disabled.
1: Clock Failure Detector is enabled.
Note that this register is protected by a lock. To write to this register the UNLOCK register has to be written first. Refer to
Section 10.7.7 ”PM Unlock Register” on page 117 for details.
42023C–SAM–02/2013
116