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SAM4L Datasheet, PDF (484/1185 Pages) ATMEL Corporation – ATSAM ARM-based Flash MCU | |||
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20.6.1 Control Register
Name:
CTRL
Access Type:
Read/Write
Offset:
0x000
Reset Value:
0x00010080
ATSAM4L4/L2
31
30
29
28
27
26
25
24
KEY
23
22
21
20
19
18
17
16
-
TBAN
CSSEL
CEN
15
14
13
12
11
10
9
8
-
-
-
PSEL
7
6
FCD
-
5
4
3
2
1
0
-
IM
SFV
MODE
DAR
EN
⢠KEY
This field must be written twice, first with key value 0x55, then 0xAA, for a write operation to be effective. This field always reads
as zero.
⢠TBAN: Time Ban Prescale Select
Counter bit TBAN is used as watchdog âbannedâ time frame. In this time frame clearing the WDT timer is forbidden, otherwise a
watchdog reset is generated and the WDT timer is cleared.
⢠CSSEL: Clock Source Select
0: Select the system RC oscillator (RCSYS) as clock source.
1: Select the 32kHz crystal oscillator (OSC32K) as clock source.
⢠CEN: Clock Enable
0: The WDT clock is disabled.
1: The WDT clock is enabled.
⢠PSEL: Time Out Prescale Select
Counter bit PSEL is used as watchdog timeout period.
⢠IM: Interrupt Mode
0: Interrupt Mode is disabled.
1: Interrupt Mode is enabled.
⢠FCD: Flash Calibration Done
This bit is set after any reset.
0: The flash calibration will be redone after a watchdog reset.
1: The flash calibration will not be redone after a watchdog reset.
⢠SFV: WDT Control Register Store Final Value
0: WDT Control Register is not locked.
1: WDT Control Register is locked.
Once locked, the Control Register can not be re-written, only a reset unlocks the SFV bit.
42023CâSAMâ02/2013
484
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