SAM4L Datasheet, PDF (510/1185 Pages) ATMEL Corporation – ATSAM ARM-based Flash MCU

21.7.10 Test Register
Name:
Access Type:
Offset:
Reset Value:
TEST
Read/Write
0x024
0x00000000
ATSAM4L4/L2
31
TESTEN
30
INT30
29
INT29
28
INT28
27
INT27
26
INT26
25
INT25
24
INT24
23
INT23
22
INT22
21
INT21
20
INT20
19
INT19
18
INT18
17
INT17
16
INT16
15
INT15
14
INT14
13
INT13
12
INT12
11
INT11
10
INT10
9
INT9
8
INT8
7
6
5
4
3
2
1
0
INT7
INT6
INT5
INT4
INT3
INT2
INT1
NMI
• TESTEN: Test Enable
0: This bit disables external interrupt test mode.
1: This bit enables external interrupt test mode.
• INTn: External Interrupt n
Writing a zero to this bit will set the input value to INTn to zero, if test mode is enabled.
Writing a one to this bit will set the input value to INTn to one, if test mode is enabled.
Refer to the Module Configuration section for the number of external interrupts.
• NMI: Non-Maskable Interrupt
Writing a zero to this bit will set the input value to NMI to zero, if test mode is enabled.
Writing a one to this bit will set the input value to NMI to one, if test mode is enabled.
If TESTEN is 1, the value written to this bit will be the value to the interrupt detector and the value on the pad will be ignored.
42023C–SAM–02/2013
510