SAM4L Datasheet, PDF (495/1185 Pages) ATMEL Corporation – ATSAM ARM-based Flash MCU

ATSAM4L4/L2
21. External Interrupt Controller (EIC)
Rev: 3.0.2.0
21.1 Features
• Dedicated interrupt request for each interrupt
• Individually maskable interrupts
• Interrupt on rising or falling edge
• Interrupt on high or low level
• Asynchronous interrupts for sleep modes without clock
• Filtering of interrupt lines
• Non-Maskable NMI interrupt
21.2 Overview
The External Interrupt Controller (EIC) allows pins to be configured as external interrupts. Each
external interrupt has its own interrupt request and can be individually masked. Each external
interrupt can generate an interrupt on rising or falling edge, or high or low level. Every interrupt
input has a configurable filter to remove spikes from the interrupt source. Every interrupt pin can
also be configured to be asynchronous in order to wake up the part from sleep modes where the
CLK_SYNC clock has been disabled.
A Non-Maskable Interrupt (NMI) is also supported. This has the same properties as the other
external interrupts, but is connected to the NMI request of the CPU, enabling it to interrupt any
other interrupt mode.
21.3 Block Diagram
Figure 21-1. EIC Block Diagram
LEVEL
MODE
EDGE
ASYNC
EN
P o la rity
Asynchronus
IC R
IER
D IS
control
detector
CTRL
ID R
E n a b le
E X T IN T n
NMI
CTRL
CLK_SYNC
FILTER
F ilte r
LEVEL
MODE
EDGE
E d g e /L e v e l
D e te c to r
IN T n
IS R
Mask
IM R
IR Q n
W ake
detect
EIC_W AKE
42023C–SAM–02/2013
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