SAM4L Datasheet, PDF (637/1185 Pages) ATMEL Corporation – ATSAM ARM-based Flash MCU

ATSAM4L4/L2
24.7.15 Manchester Configuration Register
Name:
MAN
Access Type:
Read-write
Offset:
0x50
Reset Value:
0x30011004
31
30
29
28
27
26
25
24
–
DRIFT
1
RX_MPOL
–
–
RX_PP
23
22
21
20
19
18
17
16
–
–
–
–
RX_PL
15
14
13
12
11
10
–
–
–
TX_MPOL
–
–
9
8
TX_PP
7
6
5
4
3
2
1
0
–
–
–
–
TX_PL
This register can only be written if write protection is disabled in the “Write Protect Mode Register” (WPMR.WPEN is zero).
• DRIFT: Drift cCompensation
0: The USART can not recover from a clock drift.
1: The USART can recover from clock drift (only available in 16x oversampling mode).
• RX_MPOL: Receiver Manchester Polarity
0: Zeroes are encoded as zero-to-one transitions, and ones are encoded as a one-to-zero transitions.
1: Zeroes are encoded as one-to-zero transitions, and ones are encoded as a zero-to-one transitions.
• RX_PP: Receiver Preamble Pattern detected
Table 24-27.
RX_PP
0
0
0
1
1
0
1
1
Preamble Pattern default polarity assumed (RX_MPOL field not set)
ALL_ONE
ALL_ZERO
ZERO_ONE
ONE_ZERO
• RX_PL: Receiver Preamble Length
0: The receiver preamble pattern detection is disabled.
1 - 15: The detected preamble length is RX_PL bit periods.
• TX_MPOL: Transmitter Manchester Polarity
0: Zeroes are encoded as zero-to-one transitions, and ones are encoded as a one-to-zero transitions.
1: Zeroes are encoded as one-to-zero transitions, and ones are encoded as a zero-to-one transitions.
42023C–SAM–02/2013
637