SAM4L Datasheet, PDF (720/1185 Pages) ATMEL Corporation – ATSAM ARM-based Flash MCU

ATSAM4L4/L2
27.9.3 SMBus Timing Register
Name:
SMBTR
Access Type:
Read/Write
Offset:
0x08
Reset Value:
0x00000000
31
30
29
28
27
26
25
24
EXP
-
-
-
-
23
22
21
20
19
18
17
16
THMAX
15
14
13
12
11
10
9
8
TLOWM
7
6
5
4
3
2
1
0
TLOWS
• EXP: SMBus Timeout Clock Prescaler
Used to specify how to prescale the TIM and TLOWM counters in SMBTR. Counters are prescaled according to the following
formula
f_{prescaled, SMBus}
=
f_{--C----L---K---T---W----I--M---}
2^{(EXP + 1)}
• THMAX: Clock High Maximum Cycles
Clock cycles in clock high maximum count. Prescaled by SMBTR.EXP. Used for bus free detection. Used to time T_HIGH:MAX.
NOTE: Uses the prescaler specified by CWGR, NOT the prescaler specified by SMBTR.
• TLOWM: Master Clock Stretch Maximum Cycles
Clock cycles in master maximum clock stretch count. Prescaled by SMBTR.EXP. Used to time T_LOW:MEXT
• TLOWS: Slave Clock Stretch Maximum Cycles
Clock cycles in slave maximum clock stretch count. Prescaled by SMBTR.EXP. Used to time T_LOW:SEXT.
42023C–SAM–02/2013
720