SAM4L Datasheet, PDF(115/1185 Page) ATMEL Corporation – ATSAM ARM-based Flash MCU

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SAM4L Datasheet, PDF (115/1185 Pages) ATMEL Corporation – ATSAM ARM-based Flash MCU

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10.7.5 Divided Clock Mask

Name:

PBADIVMASK

Access Type:

Read/Write

Offset:

0x040

Reset Value:

0x0000007F

ATSAM4L4/L2

31

30

29

28

27

26

25

24

-

-

-

-

-

-

-

-

23

22

21

20

19

18

17

16

-

-

-

-

-

-

-

15

14

13

12

11

10

9

8

-

-

-

-

-

-

-

-

7

6

5

4

3

2

1

0

-

MASK[6:0]

â¢ MASK: Clock Mask

If bit n is written to zero, the clock divided by 2(n+1) is stopped. If bit n is written to one, the clock divided by 2(n+1) is enabled

according to the current power mode. Table 10-6 shows what clocks are affected by the different MASK bits.

Table 10-6. Divided Clock Mask

Bit

USART0

USART1

0

-

-

1

-

-

2

CLK_USART/ CLK_USART/

DIV

DIV

3

-

-

4

-

-

5

-

-

6

-

-

USART2

-

-

CLK_USART/

DIV

-

-

-

-

USART3

-

-

CLK_USART/

DIV

-

-

-

-

TC0

TIMER_CLOCK2

-

TIMER_CLOCK3

-

TIMER_CLOCK4

-

TIMER_CLOCK5

TC1

TIMER_CLOCK2

-

TIMER_CLOCK3

-

TIMER_CLOCK4

-

TIMER_CLOCK5

Note that this register is protected by a lock. To write to this register the UNLOCK register has to be written first. Refer to

Section 10.7.7 âPM Unlock Registerâ on page 117 for details.

42023CâSAMâ02/2013

115

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