SAM4L Datasheet, PDF (49/1185 Pages) ATMEL Corporation – ATSAM ARM-based Flash MCU

ATSAM4L4/L2
mechanism can be useful for applications that only require the processor to run when an inter-
rupt occurs.
Before entering the SLEEP mode, the user must configure:
• the SLEEP mode configuration field (BPM.PMCON.SLEEP), Refer to Table 6-1.
• the SCR.SLEEPDEEP bit to 0. (See the Power Management section in the ARM Cortex-M4
Processor chapter).
• the BPM.PMCON.RET bit to 0.
• the BPM.PMCON.BKUP bit to 0.
6.1.1.2
Exiting SLEEP mode
The NVIC wakes the system up when it detects any non-masked interrupt with sufficient priority
to cause exception entry. The system goes back to the RUN mode from which the SLEEP mode
was entered. The CPU and affected modules are restarted. Note that even if an interrupt is
enabled in SLEEP mode, it will not trigger if the source module is not clocked.
6.1.2
WAIT Mode and RETENTION Mode
The WAIT and RETENTION modes allow achieving very low power consumption while main-
taining the Core domain powered-on. Internal SRAM and registers contents of the Core domain
are preserved.
In these modes, all clocks are stopped except the 32kHz clocks (OSC32K, RC32K) which are
kept running if enabled.
In RETENTION mode, the SleepWalking feature is not supported and must not be used.
6.1.2.1
Entering WAIT or RETENTION Mode
The WAIT or RETENTION modes are entered by executing the WFI instruction with the follow-
ing settings:
• set the SCR.SLEEPDEEP bit to 1. (See the Power Management section in the ARM Cortex-
M4 Processor chapter).
• set the BPM.PSAVE.BKUP bit to 0.
• set the BPM.PMCON.RET bit to RETENTION or WAIT mode.
SLEEPONEXIT feature is also available. See ”Entering SLEEP mode” on page 48.
6.1.2.2
Exiting WAIT or RETENTION Mode
In WAIT or RETENTION modes, synchronous clocks are stopped preventing interrupt sources
from triggering. To wakeup the system, asynchronous wake up sources (AST, EIC, USBC ...)
should be enabled in the peripheral (refer to the documentation of the peripheral). The
PM.AWEN (Asynchronous Wake Up Enable) register should also be enabled for all peripheral
except for EIC and AST.
When the enabled asynchronous wake up event occurs and the system is waken-up, it will gen-
erate either:
• an interrupt on the PM WAKE interrupt line if enabled (Refer to Section 10. ”Power Manager
(PM)” on page 102). In that case, the PM.WCAUSE register indicates the wakeup source.
• or an interrupt directly from the peripheral if enabled (Refer to the section of the peripheral).
When waking up, the system goes back to the RUN mode mode from which the WAIT or
RETENTION mode was entered.
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