SAM4L Datasheet, PDF (208/1185 Pages) ATMEL Corporation – ATSAM ARM-based Flash MCU

ATSAM4L4/L2
Register (RCFASTCFG). The FRANGE and CALIB fields should only be updated when the
RCFAST is disabled. Since this is in open loop mode, the frequency will be voltage, tempera-
ture, and process dependent. Refer to Section 42. ”Electrical Characteristics” on page 1106 for
details.
13.6.5.4
Closed Loop Mode
If the tuner is enabled (RCFASTCFG.TUNEEN is one), the RCFAST is in closed loop mode. In
closed loop mode, the frequency is controlled by a tuner which measures the ratio between the
RCFAST output frequency and the 32 kHz reference clock frequency. The RCFAST clock peri-
ods are counted during one or several 32kHz clock periods. And that count allows the tuner to
adjust the RCFAST trim value to get closer to the target number of 32 kHz clock periods. The
value of the RCFASTCFG.NBPERIODS field is used to improve the tuner precision by counting
RCFAST clock periods across (1 << NBPERIODS) periods of the 32 kHz clock. The NBPERI-
ODS, LOCKMARGIN and JITMODE fields should only be updated when the tuner is disabled.
The 32 kHz reference clock is controlled by the BSCIF, refer to the 32 kHz Clock section for
details.
When a tuning procedure is completed, the Lock bit (RCFASTLOCK) in the Status Register
(PCLKSR) will be set if the current count is within RCFASTCFG.LOCKMARGIN of the target
count. Otherwise, the Lock Lost bit (RCFASTLOCKLOST) in PCLKSR will be set.
13.6.5.5
Factory Calibration
If the Flash Calibration Done (FCD) bit in RCFASTCFG is zero at any reset, then the calibration
will be redone, using the factory calibration value stored in the Flash fuses, and the
RCFASTCFG.FCD bit will be set before program execution starts in the CPU. If the
RCFASTCFG.FCD bit is one, then the RCFAST configuration will not be changed during any
reset except POR reset.
13.6.5.6
Register Protection
To prevent unexpected writes to RCFAST registers due to software bugs, write access to the
registers are protected by a locking mechanism. For details refer to Section 13.7.7 ”Unlock Reg-
ister” on page 222.
13.6.6
80MHz RC Oscillator (RC80M) Operation
Rev: 1.0.0.1
The RC80M can be used as the main clock in the device, as described in Section 10. ”Power
Manager (PM)” on page 102. The RC80M can also be used as source for the generic clocks, as
described in the “Generic Clocks” section of the SCIF.
The RC80M is enabled by writing a one to the Enable bit in the RC80M Control register
(RC80MCR.EN), and disabled by writing a zero to this bit. When enabling the RC80M,
RC80MCR.EN must be read back until it reads one. The user must ensure that the RC80M is
fully disabled before enabling, and that the RC80M is fully enabled before disabling by reading
back RC80MCR.EN.
After a Power-On Reset (POR), the Calibration Value field (RC80MCR.CALIB) is loaded with a
factory defined value stored in the Flash fuses.
To prevent unexpected writes due to software bugs, write access to the RC80MCR register is
protected by a locking mechanism. For details refer to Section 13.7.7 ”Unlock Register” on page
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