SAM4L Datasheet, PDF (583/1185 Pages) ATMEL Corporation – ATSAM ARM-based Flash MCU

ATSAM4L4/L2
the Fractional Part field in BRGR (BRGR.FP), and is activated by giving it a non-zero value. The
resolution is one eighth of CD. The resulting baud rate is calculated using the following formula:
BaudRate = ----------------^S---^e---^l--^e---^c---^t--^e---^d----^C----^l--^o---^c---^k----------------
⎛
⎝
8(2
–
O V E R ) _⎝⎛ C D
+
F_---8--P_{--⎠⎞⎠⎞}
The modified architecture is shown in Figure 24-14.
Figure 24-14. Fractional Baud Rate Generator
FP
USCLKS
CLK_USART
0
CLK_USART/DIV ₁
CLK ^Reserved 2
3
CD
Modulus
Control
16-bit Counter
FP
CD
glitch-free
logic
>1
1
0
0
0
1
SYNC
USCLKS = 3
OVER
Sampling
Divider
CLK
SYNC
0
BaudRate
Clock
1
Sampling
Clock
24.6.4.4
Baud Rate in Synchronous and SPI Mode
If the USART is configured to operate in synchronous mode (MR.SYNC is one), the selected
clock is divided by BRGR.CD. This does not apply when the external clock CLK is selected.
BaudRate = ^S----^e---^l--^e---^c---^t--^e---^d---^C-----^l--^o---^c---^k-
CD
When CLK is selected, the frequency of the external clock must be at least 4.5 times lower than
the system clock, and when either CLK or CLK_USART/DIV are selected, BRGR.CD must be
even to ensure a 50/50 duty cycle. If CLK_USART is selected, the generator ensures this
regardless of value.
24.6.5
RS485 Mode
The USART features an RS485 mode, supporting line driver control. This supplements normal
synchronous and asynchronous mode by driving the RTS pin high when the transmitter is oper-
ating. The RTS pin level is the inverse of the CSR.TXEMPTY value. The RS485 mode is
enabled by writing 0x1 to MR.MODE. A typical connection to a RS485 bus is shown in Figure
24-15.
42023C–SAM–02/2013
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