SAM4L Datasheet, PDF (1044/1185 Pages) ATMEL Corporation – ATSAM ARM-based Flash MCU

ATSAM4L4/L2
39.7 User Interface
Table 39-12. LCDCA Register Memory Map
Offset
Register
0x00
Control Register
0x04
Configuration Register
0x08
Timing Register
0x0C
Status Register
0x10
Status Clear Register
0x14
Data Register Low 0
0x18
Data Register High 0
0x1C
Data Register Low 1
0x20
Data Register High 1
0x24
Data Register Low 2
0x28
Data Register High 2
0x2C
Data Register Low 3
0x30
Data Register High 3
0x34
Indirect Access Data Register
0x38
Blink Configuration Register
0x3C
Circular Shift Register Configuration
0x40
Character Mapping Configuration Register
0x44
Character Mapping Data Register
0x58
Interrupt Enable Register
0x5C
Interrupt Disable Register
0x60
Interrupt Mask Register
0x64
Version Register
Register Name
CR
CFG
TIM
SR
SCR
DRL0
DRH0
DRL1
DRH1
DRL2
DRH2
DRL3
DRH3
IADR
BCFG
CSRCFG
CMCFG
CMDR
IER
IDR
IMR
VERSION
Access
Write-Only
Read/Write
Read/Write
Read-Only
Write-Only
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Write-Only
Read/Write
Read/Write
Read/Write
Write-Only
Write-Only
Write-Only
Read-Only
Read-Only
Reset
-
0x00000000
0x00000000
0x00000000
-
-
-
-
-
-
-
-
-
-
0x00000000
0x00000000
0x00000000
-
-
-
0x00000000
-⁽¹⁾
Note: 1. The reset value for this register is device specific. Refer to the Module Configuration section at the end of this chapter.
42023C–SAM–02/2013
1044