SAM4L Datasheet, PDF (329/1185 Pages) ATMEL Corporation – ATSAM ARM-based Flash MCU

16.6.15 Interrupt Status Register
Name:
ISR
Access Type:
Read-only
Offset:
0x02C + n*0x040
Reset Value:
0x00000000
ATSAM4L4/L2
31
30
29
28
27
26
25
-
-
-
-
-
-
-
23
22
21
20
19
18
17
-
-
-
-
-
-
-
15
14
13
12
11
10
9
-
-
-
-
-
-
-
7
6
5
4
3
2
1
-
-
-
-
-
TERR
TRC
• TERR: Transfer Error
This bit is cleared when no transfer errors have occurred since the last write to CR.ECLR.
This bit is set when one or more transfer errors has occurred since reset or the last write to CR.ECLR.
• TRC: Transfer Complete
This bit is cleared when the TCR and/or the TCRR holds a non-zero value.
This bit is set when both the TCR and the TCRR are zero.
• RCZ: Reload Counter Zero
This bit is cleared when the TCRR holds a non-zero value.
This bit is set when TCRR is zero.
24
-
16
-
8
-
0
RCZ
42023C–SAM–02/2013
329