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SAM4L Datasheet, PDF (404/1185 Pages) ATMEL Corporation – ATSAM ARM-based Flash MCU
17.7.3.5 Host Global Interrupt Enable Register
Register Name:
UHINTE
Access Type:
Read-Only
Offset:
0x0410
Reset Value:
0x00000000
ATSAM4L4/L2
31
30
29
28
27
26
25
24
-
-
-
-
-
-
-
-
23
22
21
20
19
18
17
16
-
-
-
-
-
-
-
P8INTE(1)
15
P7INTE(1)
14
P6INTE(1)
13
P5INTE(1)
12
P4INTE(1)
11
P3INTE(1)
10
P2INTE(1)
9
P1INTE(1)
8
P0INTE
7
6
5
4
3
2
1
0
-
HWUPIE
HSOFIE
RXRSMIE
RSMEDIE
RSTIE
DDISCIE
DCONNIE
Note: 1. PnINTE bits are within the range from P0INTE to P7INTE.
• PnINTE: Pipe n Interrupt Enable
This bit is cleared when the PnINTEC bit is written to one. This will disable the Pipe n Interrupt (PnINT).
This bit is set when the PnINTES bit is written to one. This will enable the Pipe n Interrupt (PnINT).
• HWUPIE: Host Wakeup Interrupt Enable
This bit is cleared when the HWUPIEC bit is written to one. This will disable the Host Wakeup Interrupt (HWUPI).
This bit is set when the HWUPIES bit is written to one. This will enable the Host Wakeup Interrupt (HWUPI).
• HSOFIE: Host Start of Frame Interrupt Enable
This bit is cleared when the HSOFIEC bit is written to one. This will disable the Host Start of Frame interrupt (HSOFI).
This bit is set when the HSOFIES bit is written to one. This will enable the Host Start of Frame interrupt (HSOFI).
• RXRSMIE: Upstream Resume Received Interrupt Enable
This bit is cleared when the RXRSMIEC bit is written to one. This will disable the Downstream Resume interrupt (RXRSMI).
This bit is set when the RXRSMIES bit is written to one. This will enable the Upstream Resume Received interrupt (RXRSMI).
• RSMEDIE: Downstream Resume Sent Interrupt Enable
This bit is cleared when the RSMEDIEC bit is written to one. This will disable the Downstream Resume interrupt (RSMEDI).
This bit is set when the RSMEDIES bit is written to one. This will enable the Downstream Resume interrupt (RSMEDI).
• RSTIE: USB Reset Sent Interrupt Enable
This bit is cleared when the RSTIEC bit is written to one. This will disable the USB Reset Sent interrupt (RSTI).
This bit is set when the RSTIES bit is written to one. This will enable the USB Reset Sent interrupt (RSTI).
• DDISCIE: Device Disconnection Interrupt Enable
This bit is cleared when the DDISCIEC bit is written to one. This will disable the Device Disconnection interrupt (DDISCI).
This bit is set when the DDISCIES bit is written to one. This will enable the Device Disconnection interrupt (DDISCI).
• DCONNIE: Device Connection Interrupt Enable
This bit is cleared when the DCONNIEC bit is written to one. This will disable the Device Connection interrupt (DCONNI).
This bit is set when the DCONNIES bit is written to one. This will enable the Device Connection interrupt (DCONNI).
42023C–SAM–02/2013
404