SAM4L Datasheet, PDF (503/1185 Pages) ATMEL Corporation – ATSAM ARM-based Flash MCU

21.7.3 Interrupt Mask Register
Name:
IMR
Access Type:
Read-only
Offset:
0x008
Reset Value:
0x00000000
ATSAM4L4/L2
31
30
29
28
27
26
-
INT30
INT29
INT28
INT27
INT26
23
INT23
22
INT22
21
INT21
20
INT20
19
INT19
18
INT18
15
INT15
14
INT14
13
INT13
12
INT12
11
INT11
10
INT10
7
INT7
6
INT6
5
INT5
4
INT4
3
INT3
2
INT2
• INTn: External Interrupt n
0: The corresponding interrupt is disabled.
1: The corresponding interrupt is enabled.
This bit is cleared when the corresponding bit in IDR is written to one.
This bit is set when the corresponding bit in IER is written to one.
Refer to the Module Configuration section for the number of external interrupts.
• NMI: Non-Maskable Interrupt
0: The Non-Maskable Interrupt is disabled.
1: The Non-Maskable Interrupt is enabled.
This bit is cleared when the corresponding bit in IDR is written to one.
This bit is set when the corresponding bit in IER is written to one.
25
INT25
17
INT17
9
INT9
1
INT1
24
INT24
16
INT16
8
INT8
0
NMI
42023C–SAM–02/2013
503