SAM4L Datasheet, PDF (1077/1185 Pages) ATMEL Corporation – ATSAM ARM-based Flash MCU

40.7.6 Status Register
Name:
SR
Access Type:
Read-only
Offset:
0x14
Reset Value:
0x00000000
ATSAM4L4/L2
31
30
29
28
27
26
25
24
-
-
-
-
-
-
-
-
23
22
21
20
19
18
17
16
-
-
-
-
-
-
-
-
15
14
13
12
11
10
9
8
-
-
-
-
-
-
-
-
7
6
5
4
3
2
1
0
-
-
-
-
OVR
DRDY
CS
EN
• OVR: Overrun
0: No overrun error occurred since last read of RHR.
1: At least one overrun error occurred since last read of RHR.
This bit is cleared when the corresponding bit in ICR is written to one.
This bit is set when a new byte has been captured and previous data in RHR has not been read.
• DRDY: Data Ready
0: No data is ready in RHR.
1: A new data is ready.
This bit is cleared when the corresponding bit in ICR is written to one.
This bit is set when a new data is captured (according to CR.DSIZE).
• CS: Capture Status
0: PARC is not in capture mode.
1: PARC is in capture mode.
• EN: Enable Status
0: PARC is disabled.
1: PARC is enabled.
42023C–SAM–02/2013
1077