SAM4L Datasheet, PDF (5/1185 Pages) ATMEL Corporation – ATSAM ARM-based Flash MCU

ATSAM4L4/L2
2. Overview
2.1 Block Diagram
Figure 2-1. Block Diagram
System
TAP
TCK
TDO
JTAG &
TDI
Serial Wire
TMS
System
Management
Access Port
128-bit
AES
DP
USBC
DM
8 EndPoints
In-Circuit ARM Cortex-M4 Processor
Emulator
Fmax 48 MHz
MEMORY PROTECTION UNIT
Instruction/
Data
System
M
M
M
S
S
HIGH SPEED
BUS MATRIX
S
S
SS
S
S
M
CONFIGURATION REGISTERS BUS
HRAM
CONTROLLER
32 KB
RAM
FLASH
CONTROLLER
LOW POWER CACHE
256/128 KB
FLASH
VDDIN
VDDOUT
VDDCORE
LDO/
SWITCHING
REGULATOR
HSB-PB
HSB-PB
HSB-PB
BRIDGE B BRIDGE D BRIDGE C
HSB-PB
BRIDGE A
PERIPHERAL
DMA
CONTROLLER
XIN32
XOUT32
RC32K
OSC32
BACKUP
SYSTEM
CONTROL
INTERFACE
BACKUP
POWER MANAGER
BACKUP
PA
REGISTERS
PB
PC
EXTINT[8..1] _{EXTERNAL INTERRUPT}
NMI
CONTROLLER
ASYNCHRONOUS
TIMER
WATCHDOG
TIMER
RXD
PICOUART
BACKUP DOMAIN
RESETN
POWER MANAGER
CLOCK
CONTROLLER
RESET
SLEEP
CONTROLLER CONTROLLER
GCLK_IN[1:0]
GCLK[3:0]
RCSYS
RCFAST
XIN0
XOUT0
RC80M
OSC0
DFLL
PLL
SYSTEM CONTROL
INTERFACE
GENERIC
CLOCK
FREQUENCY METER
PAD_EVT[3..0]
TRUE RANDOM
GENERATOR
USART0
USART1
USART2
USART3
RXD
TXD
CLK
RTS, CTS
SPI
TWI MASTER 0
TWI MASTER 1
TWI MASTER 2
TWI MASTER 3
SCK
MISO, MOSI
NPCS[3..0]
TWCK
TWD
TWI SLAVE 0
TWI SLAVE 1
TWCK
TWD
LCD
CONTROLLER
SEG[39..0]
COM[3..0]
BIASL,BIASH
CAPH,CAPL
ISCK
PA
INTER-IC SOUND
IWS
ISDI
PB
PC
CONTROLLER
ISDO
IMCK
AUDIO BITSTREAM
DAC
CLK
ABDAC[1..0]
ABDACN[1..0]
16-CHANNEL
12-bit ADC
INTERFACE
10-bit DAC
INTERFACE
CAPACITIVE TOUCH
MODULE
PARALLEL CAPTURE
CONTROLLER
GLUE LOGIC
CONTROLLER
TIMER/COUNTER 0
TIMER/COUNTER 1
AC INTERFACE
32-BIT CRC
CALCULATION UNIT
TRIGGER
AD[14..0]
ADVREFP
DACOUT
SENSE[69..0]
DIS
PCCK
PCEN1,PCEN2
PCDATA[7..0]
IN[7..0]
OUT[1..0]
CLK[2..0]
B[2..0]
A[2..0]
ACAP[3..0]
ACAN[3..0]
ACREFN
5
42023C–SAM–02/2013