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SAM4L Datasheet, PDF (1033/1185 Pages) ATMEL Corporation – ATSAM ARM-based Flash MCU
ATSAM4L4/L2
When LCD controller is disabled all segment and common terminals are driven to GND, dis-
charging the LCD in order to avoid DC voltage across the segments and a slowly fading image.
Data in the display memory is preserved.
In order to restart correctly, it is preferrable to disable all functions (blinking, FCx,...) before dis-
abling LCD controller.
39.6.4
Waveform Modes
To reduce toggle activity and hence power consumption, write a zero to the Waveform Mode
(CFG.WMOD) to enable the low power waveform mode (the LCD glass must support this
mode). The low power waveform period is then twice the standard waveform period, in both
modes DC voltage is null.
To select the standard waveform, write a one to the CFG.WMOD bit. This bit shall not be modi-
fied when LCDCA is enabled.
Figure 39-8. Waveform Modes (Three Common Lines)
VLCD
2/3 VLCD
1/3 VLCD
GND
Standard waveform
SEG0
VLCD
2/3 VLCD
1/3 VLCD
GND
Low power waveform
SEG0
VLCD
2/3 VLCD
1/3 VLCD
GND
COM0
VLCD
2/3 VLCD
1/3 VLCD
GND
COM0
VLCD
2/3 VLCD
1/3 VLCD
GND
-1/3 VLCD
-2/3 VLCD
-VLCD
Frame 1
T = 20ms
Frame 2
VThreshold
SEG0-COM0
-VThreshold
VLCD
2/3 VLCD
1/3 VLCD
GND
-1/3 VLCD
-2/3 VLCD
-VLCD
Frame 1
T = 40ms
VThreshold
SEG0-COM0
-VThreshold
39.6.5 Timing Generation
39.6.5.1
Frame Rate
The Prescaler field (PRESC) in Timing register (TIM) selects a tap point from a ripple counter.
The ripple counter output can be further divided by setting the Clock Divider (CLKDIV[2:0]).
Table 39-3.
PRESC
0
1
LCD Prescaler Selection
Output From Prescaler
CLK_LCD / 8
CLK_LCD / 16
42023C–SAM–02/2013
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