SAM4L Datasheet, PDF (901/1185 Pages) ATMEL Corporation – ATSAM ARM-based Flash MCU

ATSAM4L4/L2
33.7.2 Mode Register
Name:
MR
Access:
Read/Write
Offset:
0x04
Reset Value:
0x00000000
31
30
29
28
27
26
25
CLKDIV
23
22
21
20
19
18
17
CLKDIV
15
14
13
12
11
10
9
STARTUP
7
6
5
4
3
2
1
–
–
WORD
DACEN
TRGSEL
This register can only be written if the WPEN bit is cleared in Write Protect Mode Register.
• CLKDIV: Clock Divider for Internal Trigger
Trigger period is CLKDIV * APB clock period.
• STARTUP: Startup Time Selection
Starup time is (STARTUP + 1) * APB clock period.
• WORD: Word Transfer
WORD
0
1
Selected Resolution
Half-Word transfer (16 bits)
Word Transfer (32 bits)
• DACEN: DAC Enable
Writing a one to this bit enables the DAC.
Writing a zero to this bit disables the DAC.
• TRGSEL: Trigger Selection
24
16
8
0
TRGEN
TRGSEL
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
Selected TRGSEL
external trigger
peripheral event
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
• TRGEN: Trigger Enable
0: Internal trigger mode.
1: External trigger mode.
42023C–SAM–02/2013
901