SAM4L Datasheet, PDF (784/1185 Pages) ATMEL Corporation – ATSAM ARM-based Flash MCU

ATSAM4L4/L2
Table 29-4. Master Clock to Sample Frequency (fs) Ratio
fs Ratio IMCKFS
384 fs
23
512 fs
31
768 fs
47
1024 fs
63
• TXSAME: Transmit Data when Underrun
0: Zero sample transmitted when underrun.
1: Previous sample transmitted when underrun
• TXDMA: Single or multiple DMA Channels for Transmitter
0: Transmitter uses a single DMA channel for both audio channels.
1: Transmitter uses one DMA channel per audio channel.
• TXMONO: Transmit Mono
0: Stereo.
1: Mono, with left audio samples duplicated to right audio channel by the IISC.
• RXLOOP: Loop-back Test Mode
0: Normal mode.
1: ISDO output of IISC is internally connected to ISDI input.
• RXMONO: Receive Mono
0: Stereo.
1: Mono, with left audio samples duplicated to right audio channel by the IISC.
• RXDMA: Single or multiple DMA Channels for Receiver
0: Receiver uses a single DMA channel for both audio channels.
1: Receiver uses one DMA channel per audio channel.
• DATALENGTH: Data Word Length
Table 29-5. Data Word Length
DATALENGTH
Word Length
0
32 bits
1
24 bits
2
20 bits
3
18 bits
4
16 bits
5
16 bits compact stereo
6
8 bits
7
8 bits compact stereo
Comments
Left sample in bits 15 through 0 and right sample in bits 31 through 16 of the same word
Left sample in bits 7 through 0 and right sample in bits 15 through 8 of the same word
• MODE: Mode
Table 29-6. Mode
MODE
Comments
0 SLAVE ISCK and IWS pin inputs used as Bit Clock and Word Select/Frame Sync.
Bit Clock and Word Select/Frame Sync generated by IISC from GCLK_IISC and output to ISCK and IWS pins.
1 MASTER
GCLK_IISC is output as Master Clock on IMCK if MR.IMCKMODE is one.
42023C–SAM–02/2013
784