SAM4L Datasheet, PDF (531/1185 Pages) ATMEL Corporation – ATSAM ARM-based Flash MCU

ATSAM4L4/L2
22.7
Module Configuration
The specific configuration for each FREQM instance is listed in the following tables. The module
bus clocks listed here are connected to the system bus clocks. Refer to Section 10. ”Power Man-
ager (PM)” on page 102 for details.
Table 22-2. FREQM Clock Name
Clock Name
CLK_FREQM
CLK_MSR
CLK_REF
Description
Clock for the FREQM bus interface
Measured clock
Reference clock
Table 22-3.
Register
VERSION
Register Reset Values
Reset Value
0x00000311
Table 22-4. Clock Sources for CLK_MSR
CLKSEL Clock/Oscillator
Description
0
CLK_CPU
The clock the CPU runs on
1
CLK_AHB
High Speed Bus clock
2
CLK_APBA
Peripheral Bus A clock
3
CLK_APBB
Peripheral Bus B clock
4
CLK_APBC
Peripheral Bus C clock
5
CLK_APBD
Peripheral Bus D clock
6
OSC0
Output clock from Oscillator 0
7
CLK32K
32kHz Output clock from OSC32K or RC32K
8
RCSYS
Output clock from RCSYS Oscillator
9
DFLL0
Output clock from DFLL0
11-22
GCLK0-11
Generic clock 0 through 11
23
RC80M
Output clock from RC80M
24
RCFAST
Output clock from RCFAST
25
RC1M
Output clock from VREG RC1M
26
PLL
Output clock from PLL0
27-31
Reserved
42023C–SAM–02/2013
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