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SAM4L Datasheet, PDF (264/1185 Pages) ATMEL Corporation – ATSAM ARM-based Flash MCU
ATSAM4L4/L2
14.5.8
Page Buffer Operations
The flash memory has a write and erase granularity of one page; data is written and erased in
chunks of one page. When programming a page, the user must first write the new data into the
Page Buffer. The contents of the entire Page Buffer is copied into the desired page in flash
memory when the user issues the Write Page command, Refer to Section 14.6.1 on page 269.
In order to program data into flash page Y, write the desired data to locations Y0 to Y31 in the
regular flash memory map. Writing to an address A in the flash memory map will not update the
flash memory, but will instead update location A%32 in the page buffer. The PAGEN field in the
Flash Command (FCMD) register will at the same time be updated with the value A/32.
Figure 14-4. Mapping from Page Buffer to Flash
Flash
All locations are doubleword locations
Page Buffer
64-bit data
31
30
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1
0
Z31
Z30
Z29
Z28
Z27
Z26
Z25
Z24
Z23
Z22
Z21
Z20
Z19
Z15
ZZ1148Page ZZZ1137
Z16
Z12
Z11
Z10
Z9
Z8
Z7
Z6
Z5
Z4
Z3
Z2
Z1
Z0
Y31
Y30
Y29
Y28
Y27
Y26
Y25
Y24
Y23
Y22
Y21
Y20
Y19
Y15
YY1148Page YYY1137
Y16
Y12
Y11
Y10
Y9
Y8
Y7
Y6
Y5
Y4
Y3
Y2
Y1
Y0
X31
X30
X29
X28
X27
X26
X25
X24
X23
X22
X21
X20
X19
X15
XX1148Page XXX1137
X16
X12
X11
X10
X9
X8
X7
X6
X5
X4
X3
X2
X1
X0
42023C–SAM–02/2013
Internally, the flash memory stores data in 64-bit doublewords. Therefore, the native data size of
the Page Buffer is also a 64-bit doubleword. All locations shown in Figure 14-4 are therefore
doubleword locations. Since the HSB bus only has a 32-bit data width, two 32-bit HSB transfers
must be performed to write a 64-bit doubleword into the Page Buffer. The FLASHCALW has
logic to combine two 32-bit HSB transfers into a 64-bit data before writing this 64-bit data into the
Page Buffer. This logic requires the word with the low address to be written to the HSB bus
before the word with the high address. To exemplify, to write a 64-bit value to doubleword X0
residing in page X, first write a 32-bit word to the byte address pointing to address X0, thereafter
write a word to the byte address pointing to address (X0+4).
The page buffer is word-addressable and should only be written with aligned word transfers,
never with byte or halfword transfers. The page buffer cannot be read.
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