SAM4L Datasheet, PDF (1171/1185 Pages) ATMEL Corporation – ATSAM ARM-based Flash MCU

ATSAM4L4/L2
Fix/Workaround
Disable the PDCA, add two NOPs, and disable the SPI. To continue the transfer, enable the
SPI and PDCA.
SPI bad serial clock generation on 2nd chip_select when SCBR=1, CPOL=1, and
NCPHA=0
When multiple chip selects (CS) are in use, if one of the baudrates equal 1 while one
(CSRn.SCBR=1) of the others do not equal 1, and CSRn.CPOL=1 and CSRn.NCPHA=0,
then an additional pulse will be generated on SCK.
Fix/Workaround
When multiple CS are in use, if one of the baudrates equals 1, the others must also equal 1
if CSRn.CPOL=1 and CSRn.NCPHA=0.
45.1.4 TC
Channel chaining skips first pulse for upper channel
When chaining two channels using the Block Mode Register, the first pulse of the clock
between the channels is skipped.
Fix/Workaround
Configure the lower channel with RA = 0x1 and RC = 0x2 to produce a dummy clock cycle
for the upper channel. After the dummy cycle has been generated, indicated by the
SR.CPCS bit, reconfigure the RA and RC registers for the lower channel with the real
values.
45.1.5 USBC
In USB host mode, entering suspend mode for low speed device can fail when the
USB freeze (USBCON.FRZCLK=1) is done just after UHCON.SOFE=0.
Fix/Workaround
When entering suspend mode (UHCON.SOFE is cleared), check that USBFSM.DRDSTATE
is not equal to three before freezing the clock (USBCON.FRZCLK=1).
In USB host mode, the asynchronous attach detection (UDINT.HWUPI) can fail when
the USB clock freeze (USBCON.FRZCLK=1) is done just after setting the USB-
STA.VBUSRQ bit.
Fix/Workaround
After setting USBSTA.VBUSRQ bit, wait until the USBFSM register value is
‘A_WAIT_BCON’ before setting the USBCON.FRZCLK bit.
45.1.6 FLASHCALW
Corrupted data in flash may happen after flash page write operations.
After a flash page write operation, reading (data read or code fetch) in flash may fail. This
may lead to an expecption or to others errors derived from this corrupted read access.
Fix/Workaround
Before any flash page write operation, each write in the page buffer must preceded by a
write in the page buffer with 0xFFFF_FFFF content at any address in the page.
42023C–SAM–02/2013
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