SAM4L Datasheet, PDF (226/1185 Pages) ATMEL Corporation – ATSAM ARM-based Flash MCU

ATSAM4L4/L2
13.7.10 DFLLx Configuration Register
Name:
DFLLxCONF
Access Type:
Read/Write
Reset Value:
0x0X100000⁽¹⁾
31
30
29
28
27
26
25
24
-
-
-
-
CALIB
23
22
21
20
19
18
17
16
FCD
-
-
-
-
-
RANGE
15
14
13
12
11
10
9
8
-
-
-
-
-
-
-
-
7
6
5
4
3
2
1
0
-
QLDIS
CCDIS
-
LLAW
STABLE
MODE
EN
Note: 1. The reset value of CALB depends on factory calibration.
• CALIB: Calibration Value
Sets the Calibration Value for the DFLLx.
• FCD: Fuse Calibration Done
Set to 1 when CALIB field has been updated by the Flash fuses after a reset.
0: The flash calibration will be redone after any reset
1: The flash calibration will only be redone after a power-on reset.
• RANGE: Range Value
Set the value of the range calibration register. Refer to the table DFLL Frequency Range in the Open loop operation section.
• QLDIS: Quick Lock Disable
0: Quick Lock is enabled.
1: Quick Lock is disabled.
• CCDIS: Chill Cycle Disable
0: Chill Cycle is enabled.
1: Chill Cycle is disabled.
• LLAW: Lose Lock After Wake
0: Locks will not be lost after waking up from sleep modes.
1: Locks will be lost after waking up from sleep modes where the DFLL clock has been stopped.
• STABLE: Stable DFLL Frequency
0: FINE calibration tracks changes in output frequency.
1: FINE calibration register value will be fixed after fine lock.
• MODE: Mode Selection
0: DFLL is in Open Loop operation.
1: DFLL is in Closed Loop operation.
• EN: Enable
0: DFLL is disabled.
1: DFLL is enabled.
Note that this register is protected by a lock. To write to this register the UNLOCK register has to be written first. Refer to
Section 13.7.7 ”Unlock Register” on page 222 for details.
42023C–SAM–02/2013
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