SAM4L Datasheet, PDF (773/1185 Pages) ATMEL Corporation – ATSAM ARM-based Flash MCU

29.3 Block Diagram
Figure 29-1. IISC Block Diagram
SCIF
Power
Manager
Generic clock
PB clock
Peripheral
Bus Bridge ^PB
Peripheral ^Rx
DMA
Controller
Tx
Interrupt
Controller
IRQ
ATSAM4L4/L2
IISC
IMCK
Clocks
ISCK
IWS
Receiver
ISDI
Transmitter
ISDO
29.4 I/O Lines Description
Table 29-1. I/O Lines Description
Pin Name
IMCK
Master Clock
ISCK
IWS
Serial Clock
I²S Word Select
ISDI
Serial Data Input
ISDO
Serial Data Output
Pin Description
Type
Output
Input/Output
Input/Output
Input
Output
29.5 Product Dependencies
In order to use this module, other parts of the system must be configured correctly, as described
below.
29.5.1 I/O lines
The IISC pins may be multiplexed with I/O Controller lines. The user must first program the I/O
Controller to assign the desired IISC pins to their peripheral function. If the IISC I/O lines are not
used by the application, they can be used for other purposes by the I/O Controller. It is required
to enable only the IISC inputs and outputs actually in use.
29.5.2
Power Management
If the CPU enters a sleep mode that disables clocks used by the IISC, the IISC will stop function-
ing and resume operation after the system wakes up from sleep mode.
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