SAM4L Datasheet, PDF (576/1185 Pages) ATMEL Corporation – ATSAM ARM-based Flash MCU

ATSAM4L4/L2
24.6.2.4
Figure 24-5. Asynchronous Mode Character Reception
Example: 8-bit, Parity Enabled
Baud Rate
Clock
RXD
Start
Detection
16
16
16
16
16
16
16
16
16
16
samples samples samples samples samples samples samples samples samples samples
D0 D1 D2 D3 D4 D5 D6 D7 Parity Stop
Bit Bit
Synchronous Receiver
In synchronous mode (MR.SYNC is one), the receiver samples the RXD signal on each rising
edge of the Baud Rate Clock, as illustrated in Figure 24-6. If a low level is detected, it is consid-
ered as a start bit. Configuration bits and fields are the same as in asynchronous mode.
Figure 24-6. Synchronous Mode Character Reception
Example: 8-bit, Parity Enabled 1 Stop
Baud Rate
Clock
RXD
Sampling
Start D0 D1 D2 D3 D4 D5 D6 D7
Stop Bit
Parity Bit
Figure 24-7. Receiver Status
Baud Rate
Clock
RXD
Write
CR
Read
RHR
Start
Bit
D0
D1
D2
D3
D4
D5
D6
D7
ParityStop Start
Bit Bit Bit
D0
D1
D2
D3
D4
D5
D6
D7
Parity Stop
Bit Bit
RSTSTA = 1
RXRDY
OVRE
24.6.2.5
Receiver Operations
When a character reception is completed, it is transferred to the Received Character field in the
Receive Holding Register (RHR.RXCHR), and the Receiver Ready bit in the Channel Status
Register (CSR.RXRDY) is set. An interrupt request is generated if the Receiver Ready bit in the
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