SAM4L Datasheet, PDF (412/1185 Pages) ATMEL Corporation – ATSAM ARM-based Flash MCU

17.7.3.12 Pipe n Status Register
Register Name:
UPSTAn, n in [0..7]
Access Type:
Read-Only
Offset:
0x0530 + (n * 0x04)
Reset Value:
0x00000000
ATSAM4L4/L2
31
30
29
28
27
26
25
24
-
-
-
-
-
-
-
-
23
22
21
20
19
18
17
16
-
-
-
-
-
-
-
-
15
14
13
12
-
CURRBK
NBUSYBK
11
10
-
RAMACERI
9
8
DTSEQ
7
6
5
4
3
2
1
0
-
RXSTALLDI/
CRCERRI
ERRORFI
NAKEDI
PERRI
TXSTPI
TXOUTI
RXINI
• CURRBK: Current Bank
For non-control pipe, this field indicates the number of the current bank.
This field may be updated 1 clock cycle after the RWALL bit changes, so the user should not poll this field for an interrupt.
CURRBK
0
0
0
1
Current Bank
Bank0
Bank1
• NBUSYBK: Number of Busy Banks
This field indicates the number of busy bank.
For OUT pipe, this field indicates the number of busy bank(s), filled by the user, ready for OUT transfer. When all banks are
busy, this triggers an PnINT interrupt if UPCONn.NBUSYBKE is one.
For IN pipe, this field indicates the number of busy bank(s) filled by IN transaction from the Device. When all banks are free, this
triggers an PnINT interrupt if UPCONn.NBUSYBKE is one.
NBUSYBK
0
0
0
1
1
0
1
1
Number of busy bank
All banks are free.
1 busy bank
2 busy banks
reserved
• RAMACERI: Ram Access Error Interrupt
This bit is cleared when the RAMACERIC bit is written to one.
This bit is set when a RAM access underflow error occurs during IN data stage.
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