SAM4L Datasheet, PDF (600/1185 Pages) ATMEL Corporation – ATSAM ARM-based Flash MCU

ATSAM4L4/L2
Figure 24-35. Master Node Configuration, LINMR.NACT is 0x2 (IGNORE)
Frame slot = TFrame_Maximum
Frame
Header
Response
Data3 ^space
Response
Inter-
frame
space
TXRDY
RXRDY
Write
LINIR
LINTC
Break
Synch
Protected
Identifier
Data 1
Data N-1
Data N
Checksum
FSDIS=1 FSDIS=0
24.6.11.2
Slave Node Configuration
• Configure the baud rate by writing to BRGR.CD and BRGR.FP
• Configure the frame transfer by writing to LINMR fields NACT, PARDIS, CHKDIS, CHKTYPE,
DLM, and DLC
• Select LIN mode and slave node by writing 0xB to MR.MODE
• Write a one to CR.TXEN and CR.RXEN to enable both transmitter and receiver
• Wait until CSR.LINID is one
• Check for CSR.LINISFE and CSR.LINPE errors, clear errors and CSR.LINID by writing a one
to CR.RSTSTA
• Read LINIR.IDCHR
IMPORTANT: If LINMR.NACT is 0x0 (PUBLISH), and this field is already correct, the LINMR
register must still be written with this value in order to set CSR.TXRDY, and to request the corre-
sponding Peripheral DMA Controller write transfer.
The different LINMR.NACT settings result in the same procedure as for the master node, see
Section 24.6.11.1 ”Master Node Configuration” on page 598.
Figure 24-36. Slave Node Configuration, LINMR.NACT is 0x0 (PUBLISH)
TXRDY
RXRDY
LINIDRX
Read
LINID
Write
THR
LINTC
Break
Synch
Protected
Identifier
Data 1
Data N-1
Data N
Checksum
Data 1 Data 2
Data 3
Data N
42023C–SAM–02/2013
600