SAM4L Datasheet, PDF (354/1185 Pages) ATMEL Corporation – ATSAM ARM-based Flash MCU

ATSAM4L4/L2
17.6.3 USB Host Operation
17.6.3.1
Host Enabling
Figure 17-14 on page 354 describes the USBC host mode main states.
Figure 17-14. Host mode states
Macro off
Clock stopped
Device
Disconnection
<any
other
state>
Idle
Device
Connection
Device
Disconnection
Ready
SOFE = 0
SOFE = 1
Suspend
17.6.3.2
17.6.3.3
After a hardware reset, the USBC host mode is in the Reset state (see Section 17.6.1.1).
When the USBC is enabled (USBCON.USBE = 1) in host mode (USBCON.UIMOD = 0) it enters
Idle state. As soon as the USBSTA.VBUSRQ bit is one, USBC waits for a device connection.
Once a device is connected, the USBC enters the Ready state, which does not require the USB
clock to be activated.
In host mode the USBC will suspend the USB bus by not transmitting any Start Of Frame (SOF)
packets (the Start of Frame Generation Enable bit in the Host Global Interrupt register
UHCON.SOFE is zero). The USBC enters the Suspend state when the USB bus is suspended,
and exits when SOF generation is resumed.
Device detection
A device is detected by the USBC in host mode when DP or DM are not tied low, i.e., when a
device DP or DM pull-up resistor is connected. To enable this detection, the host controller has
to be notified that the VBUS is powered, which is done when USBSTA.VBUSRQ is one.
The device disconnection is detected by the host controller when both DP and DM are pulled
down.
Description of pipes
In host mode, the term “pipe” is used instead of “endpoint”. A host pipe corresponds to a device
endpoint, as illustrated by Figure 17-15 on page 355 from the USB specification.
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