SAM4L Datasheet, PDF (579/1185 Pages) ATMEL Corporation – ATSAM ARM-based Flash MCU

ATSAM4L4/L2
24.6.3.4
Receiver Time-out
The Time-out Value field in the Receiver Time-out Register (RTOR.TO) enables handling of vari-
able-length frames by detection of selectable idle durations on the RXD line. The value written to
TO is loaded to a decremental counter, and unless it is zero, a time-out will occur when the
amount of inactive bit periods matches the initial counter value. If a time-out has not occurred,
the counter will reload and restart every time a new character arrives. A time-out sets the
Receiver Time-out bit in CSR (CSR.TIMEOUT). An interrupt request is generated if the Receiver
Time-out bit in the Interrupt Mask Register (IMR.TIMEOUT) is set. Clearing TIMEOUT can be
done in two ways:
• Writing a one to the Start Time-out bit (CR.STTTO). This also aborts count down until the
next character has been received.
• Writing a one to the Reload and Start Time-out bit (CR.RETTO). This also reloads the
counter and restarts count down immediately.
Figure 24-10. Receiver Time-out Block Diagram
Baud Rate
TO
Clock
1
STTTO
Character
Received
RETTO
DQ
Clear
Clock
16-bit Time-out
Counter
Load
16-bit
Value
=
0
TIMEOUT
Table 24-6. Maximum Time-out Period
Baud Rate (bit/sec)
Bit Time (µs)
600
1 667
1 200
833
2 400
417
4 800
208
9 600
104
14400
69
19200
52
28800
35
33400
30
56000
18
57600
17
200000
5
Time-out (ms)
109 225
54 613
27 306
13 653
6 827
4 551
3 413
2 276
1 962
1 170
1 138
328
42023C–SAM–02/2013
579