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SAM4L Datasheet, PDF (132/1185 Pages) ATMEL Corporation – ATSAM ARM-based Flash MCU
ATSAM4L4/L2
10.8
Module Configuration
The specific configuration for each PM instance is listed in the following tables. The module bus
clocks listed here are connected to the system bus clocks. Refer to the “Synchronous Clocks”,
“Peripheral Clock Masking” sections for details.
Table 10-10. Power Manager Clocks
Clock Name
Description
CLK_PM
Clock for the PM bus interface
Table 10-11. Register Reset Values
Register
Reset Value
VERSION
0x00000441
Table 10-12. Effect of the Different Reset Events
AST
32 kHz XOSC oscillator
32 kHz RC oscillator
RC Oscillators Calibration register
Watchdog registers
BOD33 control register
BOD18 control register
Backup domain except AST, WDT
and 32 kHz oscillators
Core domain excluding OCD
OCD system and OCD registers
POR reset
Y
BOD33
reset
N
Y
N
Y
Y
Y
N
Y
Y
Y
Y
Y
Y
Y
Y
BOD18
reset
N
N
Y
Y
N
Y
Y
Y
External
Reset
N
WDT
Reset
N
OCD
Reset
N
N
N
N
Y
N
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
N
N
Backup
Reset
N
Y
N
N
N
N
Y
Y
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