SAM4L Datasheet, PDF(400/1185 Page) ATMEL Corporation – ATSAM ARM-based Flash MCU

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SAM4L Datasheet, PDF (400/1185 Pages) ATMEL Corporation – ATSAM ARM-based Flash MCU

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17.7.3.2 Host Global Interrupt Register

Register Name:

UHINT

Access Type:

Read-Only

Offset:

0x0404

Reset Value:

0x00000000

ATSAM4L4/L2

31

30

29

28

27

26

25

24

-

-

-

-

-

-

-

-

23

22

21

20

19

18

17

16

-

-

-

-

-

-

-

P8INT(1)

15

P7INT(1)

14

P6INT(1)

13

P5INT(1)

12

P4INT(1)

11

P3INT(1)

10

P2INT(1)

9

P1INT(1)

8

P0INT

7

6

5

4

3

2

1

0

-

HWUPI

HSOFI

RXRSMI

RSMEDI

RSTI

DDISCI

DCONNI

Note: 1. PnINT bits are within the range from P0INT to P7INT.

â¢ PnINT: Pipe n Interrupt

This bit is cleared when the interrupt source is served.

This bit is set when an interrupt is triggered by the endpoint n (UPSTAn). This triggers a USB interrupt if the corresponding pipe

interrupt enable bit is one (UHINTE register).

â¢ HWUPI: Host Wakeup Interrupt

This bit is cleared when the HWUPIC bit is written to one.

This bit is set when:

- the host controller is in the suspend mode (SOFE is zero) and an upstream resume from the peripheral is detected.

- the host controller is in the suspend mode (SOFE is zero) and a peripheral disconnection is detected.

- the host controller is in the operationnal state (VBUSRQ is one) and a device connection is detected.

This interrupt is generated even if the clock is frozen by the FRZCLK bit.

â¢ HSOFI: Host Start of Frame Interrupt

This bit is cleared when the HSOFIC bit is written to one.

This bit is set when a SOF is issued by the Host controller. This triggers a USB interrupt when HSOFE is one. When using the

host controller in low speed mode, this bit is also set when a keep-alive is sent.

â¢ RXRSMI: Upstream Resume Received Interrupt

This bit is set when an Upstream Resume has been received from the Device.

This bit is cleared when the RXRSMIC is written to one.

â¢ RSMEDI: Downstream Resume Sent Interrupt

This bit is cleared when the RSMEDIC bit is written to one.

This bit set when a Downstream Resume has been sent to the Device.

â¢ RSTI: USB Reset Sent Interrupt

This bit is cleared when the RSTIC bit is written to one.

This bit is set when a USB Reset has been sent to the device.

â¢ DDISCI: Device Disconnection Interrupt

This bit is cleared when the DDISCIC bit is written to one.

42023CâSAMâ02/2013

400

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